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B.2.1 Codegen Notes

The RISC-V backend uses the same basic strategy as x86_64: it preserves udewy's logical value-stack behavior, but keeps the shallow part of that stack in registers.

  • The current visible expression result stays in a0.
  • A small prefix of saved values is cached in callee-saved registers before deeper values spill to the real stack.
  • Calls place the first 8 arguments in a0-a7 and marshal any remaining arguments into an outbound stack area.
  • Call lowering maintains the required 16-byte stack alignment at the actual call instruction.